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www.irf.com 1 hexfet ? is a registered trademark of international rectifier. irf3710zpbf irf3710zspbf irf3710zlpbf hexfet ? power mosfet s d g v dss = 100v r ds(on) = 18m ? i d = 59a features advanced process technology ultra low on-resistance dynamic dv/dt rating 175c operating temperature fast switching repetitive avalanche allowed up to tjmax lead-free description this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely lowon-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating . these features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. d 2 pak irf3710zspbf to-220ab irf3710zpbf to-262 irf3710zlpbf absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) a i d @ t c = 100c continuous drain current, v gs @ 10v (see fig. 9) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as single pulse avalanche energy (thermally limited) mj e as (tested) sin g le pulse avalanche ener gy tested value i ar avalanche current a e ar repetitive avalanche ener gy mj t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case CCC 0.92 c/w r cs case-to-sink, flat, greased surface 0.50 CCC r ja junction-to-ambient CCC 62 r ja junction-to-ambient (pcb mount, steady state) CCC 40 max. 5942 240 10 lbfin (1.1nm) 160 1.1 20 170 200 see fig.12a,12b,15,16 300 (1.6mm from case ) -55 to + 175 pd - 95466a downloaded from: http:///

2 www.irf.com repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l = 0.27mh, r g = 25 ? , i as = 35a, v gs =10v. part not recommended for use above this value. i sd 35a, di/dt 380a/s, v dd v (br)dss , t j 175c. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100%tested to this value in production. this is applied to d 2 pak, when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint andsoldering techniques refer to application note #an-994. s d g s d g static @ t j = 25c (unless otherwise specified) parameter min. t y p. max. units v (br)dss drain-to-source breakdown volta g e 100 CCC CCC v ? v dss / ? t j breakdown volta g e temp. coefficient CCC 0.10 CCC v/c r ds(on) static drain-to-source on-resistance CCC 14 18 m ? v gs(th) gate threshold volta g e 2.0 CCC 4.0 v g fs forward transconductance 35 CCC CCC s i dss drain-to-source leaka g e current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leaka g e CCC CCC 200 na gate-to-source reverse leaka g e CCC CCC -200 q g total gate char g e CCC 82 120 nc q gs gate-to-source char g e CCC 19 28 q gd gate-to-drain ("miller") char g e CCC 27 40 t d(on) turn-on dela y time CCC 17 CCC ns t r rise time CCC 77 CCC t d(off) turn-off dela y time CCC 41 CCC t f fall time CCC 56 CCC l d internal drain inductance CCC 4.5 CCC nh between lead, 6mm (0.25in.) l s internal source inductance CCC 7.5 CCC from packa g e and center of die contact c iss input capacitance CCC 2900 CCC pf c oss output capacitance CCC 290 CCC c rss reverse transfer capacitance CCC 150 CCC c oss output capacitance CCC 1130 CCC c oss output capacitance CCC 170 CCC c oss eff. effective output capacitance CCC 280 CCC diode characteristics parameter min. t y p. max. units i s continuous source current CCC CCC 59 (body diode) a i sm pulsed source current CCC CCC 240 (body diode) v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time C C C5 07 5n s q rr reverse recover y char g e CCC 100 160 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 35a v ds = v gs , i d = 250a v ds = 100v, v gs = 0v v ds = 100v, v gs = 0v, t j = 125c r g = 6.8 ? i d = 35a v ds = 50v, i d = 35a v dd = 50v i d = 35a v gs = 20v v gs = -20v t j = 25c, i f = 35a, v dd = 25v di/dt = 100a/s t j = 25c, i s = 35a, v gs = 0v showing the integral reverse p-n junction diode. mosfet symbol v gs = 0v v ds = 25v v gs = 0v, v ds = 80v, ? = 1.0mhz conditions v gs = 0v, v ds = 0v to 80v v ds = 80v v gs = 10v ? = 1.0mhz, see fig. 5 v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 10v downloaded from: http:///

www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 175c vgs top 15v 10v8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c vgs top 15v 10v8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 2 4 6 8 10 v gs , gate-to-source voltage (v) 0 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 20s pulse width 0 10 20 30 40 50 60 70 i d , drain-to-source current (a) 0 20 40 60 80 100 120 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c vds = 15v 20s pulse width downloaded from: http:///

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 2 04 06 08 01 0 0 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v v ds = 50v v ds = 20v i d = 35a 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v sd , source-to-drain voltage (v) 0.10 1.00 10.00 100.00 1000.00 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec downloaded from: http:///

www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 50 60 i d , d r a i n c u r r e n t ( a ) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 59a v gs = 10v downloaded from: http:///

6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 15a 25a bottom 35a -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 1.0 2.0 3.0 4.0 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a downloaded from: http:///

www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-08 1.0e-07 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 10% duty cycle i d = 35a downloaded from: http:///

8 www.irf.com fig 17.

for n-channel hexfet power mosfets
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? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period
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v ds 90%10% v gs t d(on) t r t d(off) t f &' 1 (
# 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms downloaded from: http:///

www.irf.com 9 to-220ab package is not recommended for surface mount application

int e rnat ional part number rectifier lot code as s e mb l y logo year 0 = 2000 dat e code week 19 line c lot code 1789 example: t his is an irf 1010 note: "p" in assembly line position indi cates "l ead - f r ee" in the assembly line "c" as s embled on ww 19, 2000 notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf3710z.pdf 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

10 www.irf.com

dat e code ye ar 0 = 2000 week 02 a = as s e mb l y s i t e code rect if ier int ernat ional part number p = de s i gnat e s l e ad - f r e e product (opt ional) f530s in the ass embly line "l" as s embled on ww 02, 2000 t his is an irf530s with lot code 8024 int ernat ional logo rect if ier lot code assembly ye ar 0 = 2000 part number dat e code line l we e k 02 or f530s logo assembly lot code notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf3710z.pdf 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ downloaded from: http:///

www.irf.com 11 notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/ to-262 part marking information assembly lot code rectifier internat ional as s e mb le d on ww 19, 1997 note: "p" in as s embly line pos ition indicates "l ead-f ree" in the assembly line "c" logo t his is an irl 3103l lot code 1789 example: line c dat e code week 19 ye ar 7 = 1997 part number part numb er logo lot code assembly int ernational rect ifier product (optional) p = de s i gnat e s l e ad-f r e e a = assembly site code week 19 ye ar 7 = 1997 dat e code or to-262 package outline dimensions are shown in millimeters (inches) downloaded from: http:///

12 www.irf.com data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/2010 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. d 2 pak tape & reel infomation dimensions are shown in millimeters (inches) downloaded from: http:///

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